• Welcome to the NSF IUCRC Group!
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Northeastern University is now one site of a national consortium composed of six universities and industry partners (https://nsfchest.org).

Codes & Power/EM/Timing Traces

 
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News

 
November 2024
 
November 2024
Congratulations to Ruyi Ding for the paper entitled “Probe-Me-Not: Protecting Pre-trained Encoders from Malicious Probing” being accepted by NDSS 2025 to be held in San Diego in Feb. 2025. Here is the arXiv link.
May 2024
 
May 2024
Dr. Cheng Gongye (currently working in Nvidia) presented his paper, “Side-Channel-Assisted Reverse-Engineering of Encrypted DNN Hardware Accelerator IP and Attack Surface Exploration,” at IEEE Symp. on Security & Privacy (Oakland) 2024. An 8-minute presentation followed by active Q&A over the poster.
May 2024
 
May 2024
The semi-annual CHEST meeting was held in UConn. NU faculty, including Prof. Fei, Fu, Xu, Kaeli, Shrivastava, and Zhang (student Adith Jagadish Boloor on her behalf), and several students have attended to present proposals, project reviews, and posters, respectively. Graduate students Davis Ranney and Yashaswini I Makaram presented their posters to attending IAB members, faculty, and students.
May 2024
 
May 2024
TIanhong presented two papers at HOST 2024: “TrustZoneTunnel: A Cross-world Pattern History Table-based Microarchitectural Side-channel Attack” and “One Flip Away from Chaos: Unraveling Single Points of Failure in Quantized DNNs” (on behalf of Cheng Gongye), in Washington DC.
April 2024
 
April 2024
Ruyi Ding was recognized with an award from Northeastern's College of Engineering for receiving External Honors, received from ACM. Fantastic work!
April 2024
 
April 2024
Dr. Cheng Gongye attended the PhD hooding ceremony of the Northeastern University’s 122nd Commencement held on Apr. 29th in Matthews Arena. Congratulations again, Dr. Gongye!
April 2024
 
April 2024
Ziyue Zhang received an award for the best PhD Thesis as nominated by math faculty at Northeastern for his thesis titled, "Advanced Deep Learning-Assisted Side-Channel Attack Framework and Transfer Learning." Very nice work!
April 2024
 
April 2024
Northeastern University faculty and students attended the 4th New England Hardware Security Day held in WPI on Apr. 5th 2024.
February 2024
 
February 2024
Tianhong Xu's paper "TrustZoneTunnel: A Cross-world Pattern History Table-based Microarchitectural Side-channel Attack" was accepted for publication in the 2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) conference.
December 2023
 
December 2023
Cheng Gongye successfully defended his dissertation "Hardware Security Vulnerabilities in Deep Neural Networks and Mitigations" and graduated from Northeastern University. He joined NVIDIA Inc. Congratulations Dr. Gongye!
November 2023
 
November 2023
Xiang's paper titled "Deep-Learning Model Extraction Through Software-Based Power Side-Channel" was published in the 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)
October 2023
 
October 2023
Cheng Gongye's paper titled "One Flip Away from Chaos: Unraveling Single Points of Failure in Quantized DNNs" was accepted for publication into the technical program of the 2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) conference.
October 2023
 
October 2023
Cheng's paper entitled "Side-Channel-Assisted Reverse-Engineering of Encrypted DNN Hardware Accelerator IP and Attack Surface Exploration" was accepted to appear in S&P 2024, May in San Francisco.
July 2023
 
July 2023
Ruyi's paper, "EMShepherd: Detecting Adversarial Samples via Side-channel Leakage," received a distinguished paper award at the 2023 ACM Asia Conference on Computer and Communications Security.
July 2023
 
July 2023
Cheng's paper "Hammerdodger: A lightweight defense framework against rowhammer attack on dnns" appeared at the 2023 60th ACM/IEEE Design Automation Conference (DAC).
January 2018
 
January 2018
Our paper 'Algebraic Fault Analysis of SHA-3 under Relaxed Fault Models' has been accepted for publication in IEEE Transactions on Information Forensics and Security.
August 2017
 
August 2017
Our paper 'Differential Fault Analysis of SHA-3 under Relaxed Fault Models' has been accepted for publication in Journal of Hardware and Systems Security, Springer.
March 2017
 
March 2017
Chao presented our work, "Side-channel power analysis of XTS-AES", at DATE 2017 in Lausanne Switzerland.
February 2017
 
February 2017
The simulation code for the differential fault analysis of SHA-3 has been released for downloading.
November 2016
 
November 2016
The paper, "Algebraic fault analysis of SHA-3", has been accepted as long paper for Design Automation and Test in Europe (DATE) 2017. Congratulations, Pei.
November 2016
 
November 2016
The paper, "Side-channel power analysis of XTS-AES", has been accepted as long paper for Design Automation and Test in Europe (DATE) 2017. Congratulations, Chao.
May 2016
 
May 2016
Our paper, "Differential Fault Analysis of SHA3-224 and SHA3-256", is accepted for publication in FDTC 2016 - Thirteenth Workshop on Fault Diagnosis and Tolerance in Cryptography.
February 2016
 
February 2016
Our paper, "Concurrent Error Detection for Reliable SHA-3 Design", is accepted for publication in GLSVLSI'2016 - 26th ACM international conference on Great lakes symposium on VLSI.
January 2016
 
January 2016
Our paper, "A Complete Key Recovery Timing Attack on a GPU", is accepted for publication in HPCA 2016 (The 22nd International IEEE Symposium on High-Performance Computer Architecture).
September 2015
 
September 2015
Our paper, "A Unified Metric for Quantifying Information Leakage of Cryptographic Devices under Power Analysis Attacks" is accepted for publication in Asiacrypt 2015 (21st Annual International Conference on the Theory and Application of Cryptology and Information Security). Congratulations, Liwei!
June 2015
 
June 2015
Our paper, "Leakage Evaluation on Power Balance Countermeasure Against Side-Channel Attack on FPGAs" is accepted for publication in 2015 IEEE High Performance Extreme Computing Conference (HPEC ‘15). . Congratulations, Xin!
June 2015
 
June 2015
Our paper, "Towards Secure Cryptographic Software Implementation Against Side-Channel Power Analysis Attacks" and "Balance Power Leakage to Fight Against Side-Channel Analysis at Gate Level in FPGAs" are accepted for publication in ASAP 2015 - 26th IEEE International Conference on Application-specific Systems, Architectures and Processors.
April 2015
 
April 2015
Our paper, "Side-Channel Analysis of MAC-Keccak Hardware Implementations" is accepted for publication in 2015 Hardware and Architectural Support for Security and Privacy (HASP).
February 2015
 
February 2015
Our paper, "Efficient 2nd-order Power Analysis on Masked Devices Utilizing Multiple Leakage", is accepted for publication in Proc. Int. Symp. on Hardware Oriented Security and Trust (HOS'15T) . Congratulations, Liwei!
November 2014
 
November 2014
Congradulations to Neel Shah, Tushar Swamy, and Harrison Dimmig for winning the Best Cyber Security Solution for 2014 for their poster titled “Scalable Open-source Side-channel Evaluation Platform for Cryptographic Devices” at the Advanced Cyber Security Center Annual Conference. http://www.ece.neu.edu/news/poster-winners-acsc-conference
September 2014
 
September 2014
Two papers, "Power analysis attack on hardware implementation of MAC-Keccak on FPGAs" and "Side-channel power leakage analysis of different protection schemes on AES", have been accepted for publication in Proc. Int. Conf. on Reconfigurable Computing and FPGAs (ReConfig'14). Congratulations, Pei!
September 2014
 
September 2014
A new Ph.D student, Chao Luo, has joined our project. Welcome onboard, Chao!
August 2014
 
August 2014
A new Ph.D student, Zhen Hang Jiang, has joined our project. Welcome onboard, Zhen!
June 2014
 
June 2014
We have received an REU(Research Experience for Undergraduates) supplement award of $24,000 from NSF for the MRI project: Development of a Testbed for Side Channel Analysis and Security Evaluation (TeSCASE).
June 2014
 
June 2014
Neel and Tushar have presented their work “Scalable and Efficient Implementation of Correlation Power Analysis Using Graphics Processing Units (GPUs)” in the 2014 Workshop on Hardware and Architectural Support for Security and Privacy (HASP), collocated with International Symposium on Computer Architecture (ISCA).
May 2014
 
May 2014
We have received an REU supplement award of $16,000 from NSF for the SaTC project: TWC: Medium: A Unified Statistics-based Framework for Side-channel Attack Analysis and Security Evaluation of Cryptosystems.