Differential Fault Analysis of SHA3-224 and SHA3-256 [pdf ] [ppt ]

Pei Luo, Yunsi Fei, Liwei Zhang, A. Adam Ding
August 2016
FDTC 2016 - Thirteenth Workshop on Fault Diagnosis and Tolerance in Cryptography
Abstract:
The security of SHA-3 against different kinds of attacks are of vital importance for crypto systems with SHA-3 as the security engine. In this paper, we look into the differential fault analysis of SHA-3, and this is the first work to conquer SHA3-224 and SHA3-256 using differential fault analysis. Comparing with one existing related work, we relax the fault models and make them realistic for different implementation architectures. We analyze fault propagation in SHA-3 under such single-byte fault models, and propose to use fault signatures and the observed output fault for analysis and secret retrieval. Results show that the proposed method can effectively identify the injected single-byte faults, and then recover the whole internal state of $\chi^{22}_i$ for both SHA3-224 and SHA3-256.

Concurrent Error Detection for Reliable SHA-3 Design [pdf ] [ppt ]

Pei Luo, Cheng Li, Yunsi Fei
May 2016
GLSVLSI'2016 - 26th ACM international conference on Great lakes symposium on VLSI
Abstract:
Cryptographic systems are vulnerable to random errors and injected faults. Soft errors can inadvertently happen in critical cryptographic modules and attackers can inject faults into systems to retrieve the embedded secret. Different schemes have been developed to improve the security and reliability of cryptographic systems. As the new SHA-3 standard, Keccak algorithm will be widely used in various cryptographic applications, and its implementation should be protected random errors and injected faults. In this paper, we devise different parity checking methods to protect the operations of Keccak. Results show that our schemes can be easily implemented and can effectively protect Keccak system against random errors and fault injection attacks.

A Complete Key Recovery Timing Attack on a GPU [pdf ]

Zhen Hang Jiang, Yunsi Fei, David Kaeli
March 2016
HPCA 22 - The 22nd International IEEE Symposium on High-Performance Computer Architecture
Abstract:
Graphics Processing Units (GPUs) have become mainstream parallel computing devices. They are deployed on diverse platforms, and an increasing number of applications have been moved to GPUs to exploit their massive parallel computational resources. GPUs are starting to be used for security services, where high-volume data is encrypted to ensure integrity and confidentiality. However, the security of GPUs has only begun to receive attention. Issues such as side-channel vulnerability have not been addressed. The goal of this paper is to evaluate the side-channel security of GPUs and demonstrate a complete AES (Advanced Encryption Standard) key recovery using known ciphertext through a timing channel. To the best of our knowledge, this is the first work that clearly demonstrates the vulnerability of a commercial GPU architecture to side-channel timing attacks. Specifically, for AES-128, we have been able to recover all key bytes utilizing a timing side channel in under 30 minutes.